On the use of Sensors as Countermeasure against Fault Injection Techniques

    

    Prof. Olivier Potin

    

  ■ Date: May. 17, 2016 (Tuesday)

  ■ Time: 14:00 pm

  ■ Place: Room 1112, Building 301

    

ABSTRACT

  The secret key handled by a cryptographic device can be extracted using fault attacks associated with cryptanalysis techniques. These faults can be induced by different means such as laser exposure, voltage or clock glitches, electromagnetic perturbation… Electromagnetic Pulse Injection (EMPI) and Laser Pulse Injection (LPI) has been demonstrated to be efficient fault injection techniques and therefore be considered as a real threat against smartcards and SoC. Among the usual countermeasures against fault attacks, one can identify the use of embedded sensors. On one hand Bulk Built-In Current Sensors (BBICS) were introduced to detect the anomalous transient currents induced in the bulk of integrated circuits when hit by laser ionizing particles. Unfortunately, it reports a weakness in its ability to monitor NMOS transistors. Based on experimental measures, we suggest the use of triple-well CMOS to offset it. So we introduce a new BBICS architecture well suited for triple-well that offers high detection sensitivity and low area overhead. On the other hand EMPI can be used when adversaries do not have an easy access to the backside. To date, there is only one proposal which puts forward the idea of detecting ElectroMagnetic Pulse (EMP) with an embedded sensor. However, this former sensor requires a fine tuning of some timing characteristics and, as a result, its use appears complex and even impractical with SoCs which are heterogeneous by nature and designed by worldwide teams. Within this context, we introduce and experimentally validate a new sensor allowing to detect EMP. Because the sensor is fully digital, it is low cost and above all fully compliant with the standard design flow of SoC.

 

BIOGRAPHY

  Prof. Olivier Potin holds a MBA and a PhD in Microelectronics. He started his career as a software engineer. Then he was co-founder and technical manager of Oridao with the aim of developing cryptographic embedded RFID solutions before turning to research in test domain. In 2014, he joined the Ecole des Mines de Saint-Etienne as Associate Professor.

  His research interests include side-channel attacks and hardware countermeasures development, error-detecting code against fault injection and CoDesign approach to improve security.

 

 

Contact: 02-880-6768, kchoi@snu.ac.kr (Prof. Kiyoung Choi)