Moore's Law continues to provide smaller semiconductor devices with greater degree of integration, necessitating massively parallel processors. One of the best example of such a massively parallel processor architecture is that of modern GPUs, which are currently powering 3 of the top 5 supercomputers. While today's GPUs are successful because of their high energy efficiency (GFLOPs/Watt), maintaining performance scalability will require significant changes to processor and system architecture. Specifically, it is necessary to continue to improve energy efficiency and overcome increasingly tighter bandwidth constrains and reduced component reliability. I will describe the NVIDIA-led Echelon research project, of which I am a member, which is developing architectures and programming systems that aim to address these challenges and drive continued performance scaling of parallel computing from embedded systems to supercomputers.

Mattan Erez is an Assistant Professor in the Department of Electrical and Computer Engineering at the University of Texas at Austin. His research aims to improve the scalability and efficiency of performance-demanding compute platforms at all scales. Mattan's research spans the entire system from low-level microarchitecture to programming models. His most recent work has been on improving resource proportionality with a focus on reliability. Mattan received a B.Sc. in Electrical Engineering and a B.A. in Physics from the Technion, Israel Institute of Technology in 1999. He subsequently received his M.S and Ph.D. in Electrical Engineering from Stanford University in 2002 and 2007 respectively. His experience includes working as a computer architect in the Israeli Processor Architecture Research team, Intel Corporation and a member of the Merrimac streaming supercomputer and Sequoia programming system projects at Stanford.