Open source has revolutionized software. Now it's hardware's turn. In this talk, I present the chip design economics for today, introduce the free and open RISC-V instruction set architecture, and talk about how RISC-V, open-source hardware, and SiFive are changing the chip design economics for the next billion chips that are being built for IoT, edge computing, machine learning, and artificial intelligence applications.

Yunsup is SiFive’s Chief Technology Officer and co-founder, and is the technical committee chair of the RISC-V foundation. Yunsup received his PhD from UC Berkeley, where he co-designed the RISC-V ISA and the first RISC-V microprocessors with Andrew Waterman, and led the development of the Hwacha decoupled vector-fetch extension. Yunsup also holds an MS in Computer Science from UC Berkeley and a BS in Computer Science and Electrical Engineering from the Korea Advanced Institute of Science and Technology (KAIST).